Linear Ramp Voltage

The linear ramp circuit produces a voltage signal that steadily increases from zero at the rate of 25 volts per minute times the Ramp Rate dial setting. The Ramp Rate dial is a 10-turn potentiometer; therefore, if the dial is set to 4.0 turns (from the ground), the ramp rate is 25 V/min × 4.0/10 = 10 V/min.

The FET (field effect transistor), Q₁ is connected as a 3 mA constant current source. The current produces 0.9 V across the 330-ohm resistor (R₁).

The 3.3-kΩ resistor (R₂) reduces this voltage to 0.12 V across trimpot R₃. The trimmer is adjusted for proper calibration of the Ramp Rate dial. The output voltage from the trimmer (approximately +42 mV) is integrated by an inverting integrator IC₁. The output voltage from the integrator linearly decreases with a constant rate of change of voltage of minus 0.42 volts per second (-25 V/min). S₁ in the feedback circuit is used to reset the integrator to zero by discharging the 10μF integrating capacitor through the 470-Ω resistor. A 10-turn potentiometer (Ramp Rate dial R₆) is used to adjust the ramped voltage rate from zero to -25 V/min.

IC₂ is connected in a unity gain, inverting configuration. This amplifier isolates the Ramp Rate potentiometer to maintain dial linearity and inverts the signal to provide a positive ramped voltage signal. Its output starts at zero and increases (goes positive) at the preset ramp rate.

Useful links:
2N4220 datasheet (pdf)
JFET constant-current source