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# Parallel Limiters

A parallel-limiter circuit uses the same diode theory and voltage divider action as series limiters. A resistor and diode are connected in series with the input signal and the output signal is developed across the diode. The output is in parallel with the diode, hence the circuit name, parallel limiter. The parallel limiter can limit either the positive or negative alternation of the input signal.

Recall that in the series limiter the output was developed while the diode was conducting. In the parallel limiter the output will develop when the diode is cut off. You should not try to memorize the outputs of these circuits; rather, you should study their actions and be able to figure them out.

## Parallel-Positive Limiter

The schematic diagram shown in the figure below, view A, is a parallel-positive limiter. The diode is in parallel with the output and only the positive half cycle of the input is limited. When the positive alternation of the input signal is applied to the circuit (t0 to t1), the diode is forward biased and conducts. This action may be seen in view B. As current flows through the diode and the resistor, a voltage is dropped across each. Since R1 is much larger than the forward resistance of D1, most of the input signal is developed across R1. This leaves only a very small voltage across the diode (output). The positive alternation of the input signal has been limited.

Parallel-positive limiter.

From t1 to t2 the diode is reverse biased and acts as an extremely high resistance. The negative alternation of the input signal appears across the diode at approximately the same amplitude as the input. The negative alternation of the input is not limited.

As with the series limiter, the parallel limiter should provide maximum output voltage for the unlimited part of the signal. The reverse-bias resistance of the diode must be very large compared to the series resistor. To determine the output amplitude, use the following formula:

where:
Vout - amplitude of output voltage
R - value of R1
RAC - value of AC resistance of the diode (under forward and reverse biased conditions)
Vin - amplitude of input voltage

Parallel-Positive Limiter with Bias

The figure below, view A, shows the schematic diagram of a parallel-positive limiter with negative bias. The diode is forward biased and conducts without an input signal. D1 is essentially a short circuit. The voltage at the output terminals is -5 volts.

Parallel-positive limiter with negative bias.

As the positive alternation of the input signal is applied to the circuit, the diode remains forward biased and limits the entire positive alternation, as shown in view B. As the signal goes in a negative direction just before t1, the diode remains forward biased (limiting is still present) until the input signal exceeds -5 volts (t1). D1 becomes reverse biased as the anode becomes more negative than the cathode. While the input signal is more negative than the -5 volts of the bias battery (t1 to t2), the diode is reverse biased and remains cut off. The output follows the input signal from t1 to t2. At all other times during that cycle, the diode is forward biased and limiting occurs. This circuit is called a parallel-positive limiter with negative bias because the positive output is limited and the bias in the circuit is negative with reference to ground. Limiting takes place at all points more positive than -5 volts.

The circuit shown in the figure below, view A, is a parallel-positive limiter with positive bias. The positive terminal of the battery is connected to the cathode of the diode. This causes the diode to be reverse biased at all times except when the input signal is more positive than the bias voltage (t1 to t2), as shown in view B.

Parallel-positive limiter with positive bias.

As the positive alternation of the input signal is applied (t0), the output voltage follows the input signal. From t1 to t2 the input signal is more positive than +5 volts. The diode is forward biased and conducts. At this time the output voltage equals the bias voltage and limiting takes place. From t2 to t4 of the input signal, the diode is reverse biased and does not conduct. The output signal follows the input signal and no limiting takes place.

This circuit is called a parallel-positive limiter with positive bias because limiting takes place in the positive alternation and positive bias is used on the diode.

## Parallel-Negative Limiter

A parallel-negative limiter is shown in view A of the figure below. Notice the similarity of the parallel-negative limiter and the parallel-positive limiter. From t0 to t1 of the input signal, the diode is reverse biased and does not conduct, as shown in view B of the figure. The output signal follows the input signal and the positive alternation is not limited.

Parallel-negative limiter.

During the negative alternation of the input signal (t1 to t2), the diode is forward biased and conducts. The relatively low forward bias of D1 develops a very small voltage and, therefore, limits the output to nearly 0 volts.

Parallel-Negative Limiter with Bias

The circuit shown in the figure below, view A, is a parallel-negative limiter with negative bias. With no input, the battery maintains D1 in a reverse-bias condition. D1 cannot conduct until its cathode is more negative than its anode. D1 acts as an open until the input signal dips below -5 volts at t2 in view B. At t2 the input signal becomes negative enough to forward bias the diode, D1 conducts and acts like a short, and the output is limited to the -5 volts from the battery from t2 to t3. Between t3 and t4 the diode is again reverse biased. The output signal follows the input signal and no limiting occurs.

Parallel-negative limiter with negative bias.

The figure below, view A, shows a parallel-negative limiter with positive bias. The operation is similar to those circuits already explained. Limiting occurs when the diode conducts. No limiting occurs when the diode is reverse biased. In this circuit, the bias battery provides forward bias to the diode without an input signal. The output is at +5 volts, except where the input goes above +5 volts (t1 to t2), as shown in view B. The parts of the signal more negative than +5 volts are limited.

Parallel-negative limiter with positive bias.