Amplifiers

Phase Inverters

In an equipment, driver stages are located immediately before the power output stage. Push-pull stages require two input signals, each 180 degrees out of phase with the other. The phase requirement for the push-pull stage can be accomplished by using a tapped-secondary transformer between a single-ended (one transistor) driver stage and the output stage. For economy purposes and for better frequency response, transformer coupling may not be desirable. RC coupling normally is more economical and gives better frequency response.

If RC coupling is used between the driver stage and a push-pull stage, the driver stage must provide phase inversion to produce two signals 180 degrees out of phase. Phase inverters may use one stage (one transistor) or two stages (two transistors).

One-Stage Phase Inverters

The figure below shows a split-load phase inverter (transistor Q₁) feeding a push-pull output stage (transistors Q₂ and Q₃, without biasing network).

Output current of the transistor Q₁ flows through collector load resistor R₃ and emitter load resistor R₂. Resistors R₂ and R₃ are equal in value. Resistor R₁ establishes the base bias voltage.

When the input signal aids the forward bias (base becomes more positive), the output current (I₀) increases. The increased output current causes the bottom side of resistor R₃ to become less positive with respect to ground (top output signal decreases), and the top side of resistor R₂ to become more positive with respect to ground (bottom output signal increases). When the input signal opposes the forward bias, the output current decreases and the top output signal from R₃ increases, while the bottom output signal from R₂ decreases. This action produces two output signals that are reversed 180 degrees with respect to each other. The signal developed across resistor R₃ is coupled to the input circuit of transistor Q₂ through DC blocking capacitor C₁. The signal developed across resistor R₂ is coupled to the input circuit of transistor Q₃ through DC blocking capacitor C₂.

In this circuit, equal voltage outputs are obtained by making resistor R₂ equal in value to resistor R₃. However, an unbalanced impedance results because the collector output impedance of transistor Q₁ is higher than its emitter output impedance. Distortion can occur whenever strong signal current outputs occur.

The circuit in the figure below is similar to that shown in the figure above. However, the addition of resistor R₄ overcomes the unbalanced output impedance. The functions of the parts in this circuit are the same as the correspondingly referenced parts in the unbalanced circuit.

The values of resistors R₂ and R₄ are chosen so that the signal source impedance for transistor Q₂ is equal to the signal source impedance for transistor Q₃. This eliminates distortion at strong signal current values. The signal voltage loss across resistor R₄ is compensated by making resistor R₂ higher in value than resistor R₃.

Because of the large negative feedback voltage developed across resistor R₂, a large signal input is required to drive the one-stage phase inverter. This disadvantage can be overcome by using two-stage phase inverters. In addition, a two-stage phase inverter provides more power output than a one-stage phase inverter. This advantage is important if the driver stage must feed a large amount of power to a high-level push-pull power output stage.

Two-Stage Phase Inverter

The figure below shows a two-stage phase inverter consisting of two identical common-emitter configurations. Two signals, 180 degrees reversed in phase, are obtained from the phase inverter. Assume that an input signal drives the base of transistor Q₁ negative. Because of the 180 degree phase reversal in the common-emitter configuration, the collector of transistor Q₁ goes positive. One portion of this positive signal is coupled to the base of transistor Q₂ through DC blocking capacitor C₂ and attenuating resistor R₄. The other portion of the positive signal is completed through DC blocking capacitor C₄ to one input circuit of a push-pull output stage. The positive-going signal on the base of transistor Q₂ causes a negative-going signal at the collector of transistor Q₂. This negative signal is coupled through DC blocking capacitor C₅ to the other input circuit of a push-pull output stage.

Resistor R₁ provides base bias for transistor Q₁. Collector load resistor R₃ develops transistor Q₁ output signal. Resistor R₂ is the emitter swamping resistor and is AC bypassed by capacitor C₁. Resistor R₅ provides base bias for transistor Q₂. Collector load resistor R₆ develops transistor Q₂ output signal. Resistor R₇ is the emitter swamping resistor and is AC bypassed by capacitor C₃.

Since two identical common-emitter configurations are used, the source impedances are equal for the two input circuits of the push-pull output stage. In addition, the amount of power that can be delivered by the two-stage phase inverter is much greater than that of the split-load phase inverter.